Why is this microprocessor referred to as "8-Bit" when it has an address bus of 16-bits?
I was taking a look at the following microprocessor:
It is referred to as an "8-Bit Microprocessor", however in the description it is mentioned that the data bus is 8-bits and that the address bus is 16-bits.
I was relatively certain that the "bitness" of modern CPUs refer to their address bus size/width, but in this case it looks like this microprocessor's bitness refers to its data bus width.
Did the definition of a processor's "bitness" change over time? Or am I missing something?
2 Answers
"Bitness" is determined by available mode of operation. While there is some (awkward) dealing with 16-bit values, it sure has a distinctive 8-bit flavor.
Operands/registers are 8-bit only, ALU is 8-bit. Even the stack pointer register S is only 8-bit (internally prefixed with 0x01__ in the high byte to move the stack from the "zero page"... and yes, the maximum stack size is 256 bytes). Only the program counter (PC) is 16 bit.
To make use of the 16-bit addressable RAM - other than for loading instructions - with computed addresses (as opposed to fixed ones, which can be included in the machine code), one would have to use a zero page address... like in LDA ($24),Y, which would take the 16-bit base "pointer" stored at 0x24 and 0x25, add the 8-bit Y (think of that as an index or byte offset), and then move the 8-bit content from this address into A. So two adjacent bytes on the "zero page" (0x00-0xff) unused by the "operating system" and available to your program are a hot commodity on a 6502 ;)
Similar goes with the Z80 processor family. Two 8-bit registers can be used together (e.g. HL, aptly named high and low) to form a 16-bit address... but the processor is still considered to be 8-bit. Intel 8068 had a 20-bit address bus, but was a 16-bit processor. So address bus "bitness" doesn't determine processor bitness at all. Register size/load instructions are much more important :)
There's many things about a CPU that can have X-bits.
Width of registers (usually care about the ones involved in ALU operations like accumulator or general-purpose registers - or the specific register that tells the CPU where it's getting its next instruction, often called the Program Counter [PC] or Instruction Pointer [IP])
Width of opcodes, if all instructions are fixed width
Maximum width of address operands to instructions - the PC or IP will generally have to be this wide so the CPU can execute from all memory.
Width of external data bus - and it's possible to have things like a slower "multiplexed" 8-bit data bus when most CPU instructions deal with 16 bits (68008 for example).
Width of external address bus (number of address pins on the CPU) - may not match maximum width of instruction address operands.
All of these can be different.
1 and 2 is probably the most influential factor in saying a CPU is X-bits.
Sometimes the lines aren't clear and the designation is likely more to do with tradition or the types of external chips/devices it interfaces with.
A 6502 has 8-bit registers (except the PC which is 16 bits), but has 16 address bits.
All instructions that accept address operands have 2 bytes following the 1 byte instruction to identify the address.
Exception: there are "zero page" instructions that take 1 byte for an address, and assume the upper byte of the address is 0. These are faster.
It's hard to call this a 16-bit chip in any way even though it can deal with 16-bit wide addresses.
A Z80 has 8-bit registers (16-bit Instruction Pointer) and 16 address bits like the 6502.
All instructions that accept address operands have 2 bytes following the 1 byte instruction to identify the address.
Certain registers can be paired (BC, DE, HL) to work like 16-bit registers. In addition, there are two 16-bit only registers IX and IY. This makes the Z80 very "16-bit"-ey
No zero page but lots of flexibility with the registers.
Most would call the Z80 an 8-bit CPU, but it has a lot of "16-bitness" to it.
The 68000 is often called a 16-bit CPU, but it has 24 address lines (later versions had more I think).
- Has lots of addresses (D and A registers) - all 32 bits wide. But (certain) instructions can optionally just deal with only the lower 8 bits (for the D registers), or lower 16 bits (A registers only).
- Memory operands on the 68000 are all 32-bits wide.
- Instructions are 16-bit wide (and well organized), but there are the "Q" instructions that ADDQ, MOVEQ that use the lower 8 bits of the instruction itself as an operand.
- Operations that deal with words (16-bits) must be aligned on even addresses.
So is the 68000 has a lot of "32-bitness" to it despite the fact it's traditionally considered a 16-bit CPU, and still has aspects that deal with 8-bit quantities.
There's plenty more blurred lines. The 8086 was really weird with its segment registers - using the concept of a segment to make a 16-bit address a "window" into a larger address space.
For modern x86 CPUs, instruction length is irregular and all over the place due to the instruction set being extended over decades and by AMD independently of Intel and vice versa.
But since the 80386 the Instruction Pointer has been 32 bits for a long time (with processor modes that can do the old CS:IP thing for DOS compatibility), but is 64 bits in 64-bit mode.
In the 16-bit x86 days the IP was 16 bits, but a "segment register" called CS would make the real address CS times 16 plus IP-there were near jumps that just modified the IP and far jumps that modified both. x86 has been a mess for a long time.
Even 64-bit x86 CPUs with their 64-bit wide registers can still deal with just the first 8 bits of various registers when needed. And then you have the floating point/SIMD section of the CPU which might have registers as wide as 512 bits, but those aren't "general purpose" registers.
